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DIY logic analyzer: COBS framing + auto-CRC brute-force replaces $500 tools on a $20 chip.
Embedded firmware engineers, hardware debuggers, makers using microcontrollers
Saleae Logic Analyzer (hardware) · Sigrok (open-source logic software) · JTAGulator
I built a small UART analyzer using an ESP32-S3 as a cheap probe. It taps the target’s TX at 921600 baud and streams raw bytes to the PC over USB CDC.
To make it robust and easy to resync, the S3 wraps data into a tiny binary frame: 'A''N' | type | seq16 | timestamp32 | len16 | payload, then COBS-encodes it with 0x00 delimiters.
On the PC side (Python/Tkinter), the UI shows: - RAW hexdump + throughput graph + health stats (seq gap / overflow) - LOG/TEXT views (extract printable ASCII runs) - Record/Replay (.anlog) for offline reproduction - AUTO parser: scans magic bytes and brute-forces CRC variants for unknown inner frames
This started as a personal debugging bridge between firmware and host, and helped me catch dropped chunks, burst patterns, and protocol mistakes without a logic analyzer.
Repo: https://github.com/choihimchan/linkscope-bpu-uart-analyzer
I’d love feedback on framing, replay formats, or parsing heuristics. Thanks!
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