HN Showcase
Back to browse
FpgacapZero on BRS-100-GW1NR9 dev board

FpgacapZero on BRS-100-GW1NR9 dev board

by brisbanesilicon·May 20, 2026·1 point·0 comments
Visit ProjectView on HN

AI Analysis

●●SolidNiche GemCozy

Vendor-agnostic JTAG debugging without GUI gymnastics is a win for FPGA devs.

Strengths
  • •Pure HDL implementation avoids vendor blobs and keeps the workflow fully scripted.
  • •Enables open-source Embedded Logic Analyzer usage on specific GoWIN hardware.
  • •Solves the specific pain of vendor lock-in for debugging on this dev board.
Weaknesses
  • •Extremely narrow audience limited to owners of this specific FPGA board.
  • •Incremental porting work rather than a novel architectural breakthrough.
Category
Hardware
Target Audience

FPGA engineers, Hardware hackers, Embedded developers

Similar To

GoWIN Analyzer Oscilloscope · OpenOCD · Sigrok

Post Description

As per title. Took a bit of fiddlin' but we got there.

Similar Projects